The power requirements for an integrated circuit (IC) such as a microprocessor are typically provided via a voltage regulator (VR). However, there are conflicting objectives in the design of voltage regulators for ICs. On one hand, the thermal design current (TDC) specification calls for a certain degree of efficiency in the VR. On the other hand, the transient load line (LL) specification requires a fast response time of the VR. Since fast response time in a VR generally comes at the expense of efficiency, it typically has not been possible to optimize a VR for both efficiency and response time.
Dual VR solutions have been proposed, but the control arrangements for dual VRs have been complex and unsatisfactory.